65816: Build 4 – Current Status – 7/15/2022

Build 4 – Current Specification As of 7/15/2022, Build 4 has tested successfully with: Both 65C02 and 65C816 up to 10 MHz where I started to get display glitches 524k memory. Current configuration: ~457k RAM ($0000-$F7FF, $20000-$7FFFF), 55 ns ~67k ROM ($F800-$1FEFF), 70 ns 256 bytes I/O ($1FF00-$1FFFF) 65C22 VIA ($1FF10, shift register dedicated to …

65816: Build 4 – Troubleshooting 4 – Testing a Different Address Decoder

Off and on throughout my Build 4 troubleshooting journey I kept wondering if the PLD was the underlying issue. While a PLD is handy for making after the fact changes to your build’s memory map, it also has a handy feature I hadn’t thought of before. Since the PLD brings control input and output signals …

65816: Build 4 Troubleshooting 1 – It’s the PLD, or is it?

I worked on the Build 4 modifications over several weeks, partly because I was just playing around with what I had on hand when I started and partly getting sidetracked looking into why things happen instead of just getting on with the build. In this post I discuss one of those side investigations regarding the …

6502: My Fourth Build – Testing the New Programmable Logic Device

I completed my fourth 6502 build the other day. It’s a barebones build, mainly intended to test my new PLD-based address decoding/interrupt request design. I didn’t need serial or keyboard support to test the PLD so haven’t included quite a bit of the I/O support that I had in build 3. I’m thinking that I’ll …

6502: Coding

After you’ve finished Ben Eater’s 6502 computer project, if not long before, as with me, you may be wondering about editor and assembler options for your 6502 coding work. Ben uses a basic Linux based editor and the VASM assembler throughout his project. If you are a regular Linux user you may be comfortable using …