65816: Build 4 – Current Status – 5/14/2022

Build 4 – Current Specification As of 5/14/2022, Build 4 has tested successfully with: Both 65C02 and 65C816 up to 10 MHz where I started to get display glitches 512k memory. Current configuration: ~444k RAM ($0000-$FEFF, $20100-$7FFFF), 55 ns ~64k ROM ($FF00-$1FFFF), 70 ns 256 bytes I/O ($20000-$200FF) 65C22 VIA ($20010, shift register dedicated to …

65816: Build 4 – Troubleshooting 4 – Testing a Different Address Decoder

Off and on throughout my Build 4 troubleshooting journey I kept wondering if the PLD was the underlying issue. While a PLD is handy for making after the fact changes to your build’s memory map, it also has a handy feature I hadn’t thought of before. Since the PLD brings control input and output signals …

6502: My Fourth Build – Testing the New Programmable Logic Device

I completed my fourth 6502 build the other day. It’s a barebones build, mainly intended to test my new PLD-based address decoding/interrupt request design. I didn’t need serial or keyboard support to test the PLD so haven’t included quite a bit of the I/O support that I had in build 3. I’m thinking that I’ll …